Research Fellow, School of Electronics, Electrical Engineering and Computer Science

Available from 1 November 2016 for 15 months, this post will lead the development of picoStreams, a streaming overlay architecture for Field Programmable Gate Array which will be the highest performance software-programmable architecture available for FPGA.
This position will specifically develop picoStreams and proof-of-concept demonstrators on two state-of-the-art workloads, one each in the domains of software radio and high performance data analytics. Assist in the development of follow-on research proposals and to plan, deliver, promote and extend the picoStreams demonstrators and concepts in line with project goals.

MAJOR DUTIES:

• Extend and refine the picoStreams FPGA processor and integrate on Xilinx Zynq FPGA.
• Develop picoStream-based software-radio and data analytics accelerators and demonstrator testbeds.
• Demonstrate picoStreams and the demonstrators developed in industry and academic fora.
• Present regular progress reports to disseminate and publicise research findings.
• Prepare, in consultation with the grant holder, material for publication in national and international journals and presentations at international conferences.
• Assist grant holder in the preparation of funding proposals and applications to external bodies.
• Lead potential commercialisation of picoStreams.
• Carry out administrative tasks associated with the project to ensure that it is completed on time and within budget. These might include organisation of project meetings and documentation, financial control, risk assessment of research activities.
• Carry out occasional undergraduate supervision, demonstrating or lecturing duties within the post holder’s area of expertise and under the direct guidance of a member of academic staff. Read academic papers, journals and textbooks to keep abreast of developments in own specialism and related disciplines.
• Any other duties which may be reasonably requested, by the grant holder, from time-to-time.

Planning and Organising:

• Plan for specific aspects of research programmes. Timescales range from 1-6 months in advance and contribute to research group planning.
• Plan for the use of research resources, laboratories and workshops where appropriate.
• Plan own day-to day activity within framework of the agreed research programme.
• Plan up to a year in advance to meet deadlines for demonstrations, publications and to prepare presentations and papers for conferences.
• Coordinate and liaise with other members of the research group over work progress.

Resource Management Responsibilities:

• Ensure research resources are used in an effective and efficient manner.
• Provide guidance as required to support staff and any students who may be assisting with research.

Internal and External Relationships:

• Liaise on a regular basis with colleagues and students.
• Build internal contacts and participate in internal networks for the exchange of information and to form relationships for future collaboration.
• Join external networks to share information and ideas.
• Contribute to the School’s outreach programme by establishing links with local community groups, industries etc.

ESSENTIAL CRITERIA:

• Have or be about to obtain a relevant PhD in Computer Science, Electronic Engineering or closely related discipline.
• At least 3 years’ experience in the development of FPGA-based accelerators, heterogeneous computing architectures and/or high performance custom processor architectures.
• Sufficient breadth and depth of specialist knowledge in the discipline and of research methods and techniques to work within established research programmes.
• Demonstrable intellectual ability.
• Ability to contribute to broader management and administrative processes.
• Ability to contribute to the School’s outreach programme by developing links with industry.
• Ability to communicate complex information clearly.
• Ability to assess and organise resources.
• Ability to build contacts and participate in internal and external networks.

DESIRABLE CRITERIA:

• PhD addressing FPGA and/or high performance custom processor design.
• Good working knowledge of FPGA device architectures, FPGA development tools and processes.