PhD Research Project - Reconfigurable HW/SW Accelerators for Adaptive Computing in Heterogeneous Pl

Aug 02, 2018
Sep 10, 2018
Organization Type
University and College
Full Time
At the Centre on Software Technologies and Multimedia Systems (CITSEM), Universidad Politécnica de Madrid (UPM), Spain, we are opening a 3-year position for a PhD student in the area of heterogeneous reconfigurable computing accelerators for adaptive Cyber-Physical Systems (CPS). We are looking for a highly motivated individual, passionate about (some of) the below described areas, with high commitment to the work, able to work independently, good collaborative skills and interest to engage in an international work team.

This position is framed and funded within the H2020 project “CERBERO - Cross-layer modEl-based fRamework for multi-oBjective dEsign of Reconfigurable systems in unceRtain hybRid envirOnments”, which began in January 2017 (



Novel tools/models/methodologies for the design and runtime management of hybrid HW/SW reconfigurable accelerators. The resulting systems are able to execute applications described using dataflow Models of Computation (MoC) and dynamically reconfigure the available HW/SW computing resources. Targeted applications and algorithms include (but are not limited to) control and trajectory optimization of robotic arm manipulators and embedded machine learning for classification tasks in hyperspectral image processing. A more specific list of subtopics follows:

Seamless HW/SW reconfiguration through the exploration of:

  • Dynamically and partially reconfigurable systolic architectures templates in SoC-FPGAs
  • Runtime-efficient Intermediate Representations (IR) for fine/coarse-grained HW/SW reconfiguration (reconfigurable systolic template and ARM cores)
  • Runtime-efficient IR compilers (LLVM-based, custom defined, etc.)
  • Runtime actor mapping in the available HW/SW resources

Dataflow specification and programming of applications using heterogeneous computing platforms such as Xilinx Ultrascale+ and Intel SoC FPGAs

The reconfiguration capabilities of the system will enable adaptive and approximate computing using dataflow-based runtime systems for:

  • Power/Energy runtime optimization
  • Dynamically adaptive parallelism
  • Computational load balancing
  • Fault tolerance and self-healing
  • System self-adaptation using Artificial Intelligence techniques (machine leaning, reinforcement learning, evolutionary algorithms…)

Integration of the proposed models and techniques in the CERBERO design environment.



The candidate is provided with a PhD scholarship for up to 3 years (exceptional extensions might be considered) according to the general UPM regulations. These include full social security coverage and a net salary competitive for living standards in a city as Madrid. Expenses for attending conferences and workshops are covered with the available funding. The work is developed in an international research environment of several Universities and companies, so research visits during the duration of the PhD are more than encouraged.

Application deadline and position start date:

We will be accepting candidates until September 8th, 2018

The interviews will run during the following weeks in September 2018

The start date is flexible but ideally ASAP after the interviews.

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